Rising DDR memory prices are no longer just a PC and laptop problem. As HBM consumes the advanced DRAM wafers that used to make standard memory, ordinary DDR4 and DDR5 have turned scarce, and the BOM of network equipment like a gigabit switch or an OLT is feeling the squeeze too. This is a chain reaction across the whole semiconductor supply chain, not a shortage that PC and phone buyers alone have to absorb.
HBM is pulling advanced DRAM capacity away from standard DDR, structurally shrinking the pool left for networking gear.
DRAM contract prices rose 80–90% quarter-over-quarter in Q1 2026; spot DDR is up more than 700% since September 2025.
Chassis OLTs and large-buffer switches carry the most DDR, so they absorb the cost push first and hardest.
HBM (high-bandwidth memory) is the standard memory for AI accelerators. It carries a high unit price and fat margins, so the top three DRAM makers would rather stack wafers into HBM than make more commodity DDR. The result: HBM now approaches 40% of total DRAM industry revenue, and the capacity pool left for standard DDR has been systematically compressed.
Note: This is not a short, one-quarter shortage. Analysts estimate a 50–60% capacity gap that will not ease until new fabs ramp up around 2028. In Q1 2026 alone, DRAM contract prices rose 80–90% quarter-over-quarter — the largest single-quarter jump on record — and DDR spot prices have climbed over 700% since September 2025. A 64 GB RDIMM used in servers went from about $450 (late 2025) to over $900 (2026), and the climb has not stopped.
Do not assume a network device "only forwards, never computes." A managed network switch or an OLT typically burns DDR in at least three places:
Control plane: the main chip runs the OS, management agent, and protocol stacks, and needs DDR as working memory. Even a basic layer 2 switch needs DDR for its control plane and MAC tables.
Packet buffer: large-buffer switches use external DDR to absorb burst traffic and avoid drops.
Subscriber tables: one OLT tracks the tables and traffic flows of hundreds or thousands of ONUs, so its memory scales with subscriber count.
A chassis OLT or a core switch with a deep packet buffer uses far more DDR than a small box device. So even under the same price surge, mid- and high-end models with large buffers and big subscriber tables feel it earlier.
| Device type | Main DDR use | Price-sensitivity |
|---|---|---|
| Small box switch | Control plane | Low |
| Managed / large-buffer switch | Control plane + packet buffer | Medium |
| Chassis OLT | Control plane + subscriber tables + traffic buffer | High |
Tip: When you budget a layer 2 switch or a chassis gigabit switch, expect the memory line to move more than the passive parts. Models with deep buffers and many subscriber entries are the ones to watch on cost.
DDR used to be the second-priciest item in a network device BOM after the main control chip. Now, on many platforms, the memory alone costs more than the control chip. A mid- or high-end OLT carrying 16–32 GB of control memory can see its memory cost multiply fivefold or more. Stack that on top of the MLCC wave, and the passive-plus-memory portion of the whole BOM rises together, pushing both quote and lead time under pressure.
Warning: If you quote long-lead OLT or large-buffer switch projects at old memory prices, the gap between your quote and the build cost can widen fast. Keep quote validity short and confirm memory pricing with procurement before committing.
How are HBM and DDR5 related, and why does HBM's rise pull DDR5 up? HBM and DDR5 both come from DRAM wafers. Because HBM is far more profitable, the big makers shift advanced capacity into stacking HBM, leaving standard DDR5 with less capacity — so it gets scarce and expensive.
Do switches really use DDR? Yes. The control plane runs the OS, large-buffer switches use DDR as packet buffer, and OLTs use DDR for subscriber tables and traffic flows. Chassis OLTs and deep-buffer models use the most.
Is the BOM hit bigger from DDR or from MLCC? Usually DDR is the bigger single swing. DDR is a smaller share of one device's BOM than the main chip, but with DDR up 700%+, combined with the MLCC wave, the passive-plus-memory cost of mid- and high-end models rises noticeably.
How much did a 64 GB RDIMM rise? From about $450 (late 2025) to over $900 (2026) — close to double. DDR5 spot prices have climbed more than 700% since September 2025.
When does this surge end? Analysts see a 50–60% DRAM capacity gap that only eases when new fabs ramp around 2028, so 2026–2027 should be planned as a tight balance for both production and quoting.
The DDR price climb is a chain reaction of HBM grabbing DRAM capacity: Q1 2026 contract prices up 80–90% quarter-over-quarter, spot DDR up over 700%, 64 GB RDIMMs past $900, and switch and OLT costs rising with them. Stacked on the MLCC wave, network-equipment BOM and lead times are both under pressure — and the practical defense is early order locking and short quote validity.
About the author: Sara — Sara is a Customer Manager at Rayin with over 10 years of experience in the communications field. She specializes in technical product selection and writes guides and tutorials that help procurement engineers and system integrators solve problems more efficiently. In her free time, she enjoys badminton and swimming.
About Rayin: Shenzhen Rayin Technology Co., Ltd. — Company Profile
